summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/Disassembler
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-10-20 17:28:20 +0000
committerJim Grosbach <grosbach@apple.com>2011-10-20 17:28:20 +0000
commit79ebc51c4569c07cf92d9c64b75fc7d0a592195f (patch)
treeac9104c2ecb5f007421cef7670c01596bd200ac6 /llvm/lib/Target/ARM/Disassembler
parent9006807dcd7100bbf03dd7e5fcf74db06eea6cc4 (diff)
downloadbcm5719-llvm-79ebc51c4569c07cf92d9c64b75fc7d0a592195f.tar.gz
bcm5719-llvm-79ebc51c4569c07cf92d9c64b75fc7d0a592195f.zip
Tidy up. Trailing whitespace.
llvm-svn: 142591
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 7215ed3cd15..b1f7fd6fe4a 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -527,7 +527,7 @@ static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value,
MI.addOperand(MCOperand::CreateExpr(ARMMCExpr::CreateLower16(Expr, *Ctx)));
else if (SymbolicOp.VariantKind == LLVMDisassembler_VariantKind_None)
MI.addOperand(MCOperand::CreateExpr(Expr));
- else
+ else
assert(0 && "bad SymbolicOp.VariantKind");
return true;
@@ -3074,7 +3074,7 @@ static DecodeStatus DecodePostIdxReg(llvm::MCInst &Inst, unsigned Insn,
static DecodeStatus DecodeThumbBLXOffset(llvm::MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
- if (!tryAddingSymbolicOperand(Address,
+ if (!tryAddingSymbolicOperand(Address,
(Address & ~2u) + SignExtend32<22>(Val << 1) + 4,
true, 4, Inst, Decoder))
Inst.addOperand(MCOperand::CreateImm(SignExtend32<22>(Val << 1)));
OpenPOWER on IntegriCloud