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author | Oliver Stannard <oliver.stannard@arm.com> | 2018-02-08 14:21:28 +0000 |
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committer | Oliver Stannard <oliver.stannard@arm.com> | 2018-02-08 14:21:28 +0000 |
commit | 3c11ecbbab6af2c0b04855018a3f97ccf45ca28d (patch) | |
tree | 54294b60cd31d6fd403fd589c3d3b736ce0e70b8 /llvm/lib/Target/ARM/Disassembler | |
parent | 0b9f3912ce403000706f06ffced6b78b8a38ea24 (diff) | |
download | bcm5719-llvm-3c11ecbbab6af2c0b04855018a3f97ccf45ca28d.tar.gz bcm5719-llvm-3c11ecbbab6af2c0b04855018a3f97ccf45ca28d.zip |
Revert r324600 as it breaks a buildbot
The broken bot (clang-ppc64le-linux-multistage) is doign a shared-object build,
so I guess using lookupBankedRegByEncoding in the disassembler is a layering
violation?
llvm-svn: 324604
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index f9a0a74bf8b..658a67511ff 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -4205,8 +4205,15 @@ static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val, // The table of encodings for these banked registers comes from B9.2.3 of the // ARM ARM. There are patterns, but nothing regular enough to make this logic // neater. So by fiat, these values are UNPREDICTABLE: - if (!ARMBankedReg::lookupBankedRegByEncoding((R << 5) | SysM)) - return MCDisassembler::Fail; + if (!R) { + if (SysM == 0x7 || SysM == 0xf || SysM == 0x18 || SysM == 0x19 || + SysM == 0x1a || SysM == 0x1b) + return MCDisassembler::SoftFail; + } else { + if (SysM != 0xe && SysM != 0x10 && SysM != 0x12 && SysM != 0x14 && + SysM != 0x16 && SysM != 0x1c && SysM != 0x1e) + return MCDisassembler::SoftFail; + } Inst.addOperand(MCOperand::createImm(Val)); return MCDisassembler::Success; |