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| author | Jiangning Liu <jiangning.liu@arm.com> | 2012-08-02 08:21:27 +0000 |
|---|---|---|
| committer | Jiangning Liu <jiangning.liu@arm.com> | 2012-08-02 08:21:27 +0000 |
| commit | 288e1af8c8485edef4ff6d3d3c388a05df3b0ef7 (patch) | |
| tree | 66d733a2fd62d473402ff58d9bb784d4d6b1697b /llvm/lib/Target/ARM/Disassembler | |
| parent | 9e97ae143ff2b991c619bc1140c541dd16fa0691 (diff) | |
| download | bcm5719-llvm-288e1af8c8485edef4ff6d3d3c388a05df3b0ef7.tar.gz bcm5719-llvm-288e1af8c8485edef4ff6d3d3c388a05df3b0ef7.zip | |
Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.
llvm-svn: 161161
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 47cca2aef0a..6f36dcc1ef3 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -3494,19 +3494,8 @@ static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) { - switch (Val) { - default: + if (Val & ~0xf) return MCDisassembler::Fail; - case 0xF: // SY - case 0xE: // ST - case 0xB: // ISH - case 0xA: // ISHST - case 0x7: // NSH - case 0x6: // NSHST - case 0x3: // OSH - case 0x2: // OSHST - break; - } Inst.addOperand(MCOperand::CreateImm(Val)); return MCDisassembler::Success; |
