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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-25 00:14:01 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-10-25 00:14:01 +0000 |
| commit | 17ec1a19e5b28c45ae1280b5bedb2fc884312d70 (patch) | |
| tree | 4d5c6981b0ca2ad839764ba66cae1f903f63bfa8 /llvm/lib/Target/ARM/Disassembler | |
| parent | 93127aecb961cbfad3e3c2fc7929ac9d55536b34 (diff) | |
| download | bcm5719-llvm-17ec1a19e5b28c45ae1280b5bedb2fc884312d70.tar.gz bcm5719-llvm-17ec1a19e5b28c45ae1280b5bedb2fc884312d70.zip | |
ARM assembly parsing and encoding for VLD1 with writeback.
Four entry register lists.
llvm-svn: 142882
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index ddc5c99d364..5174134c465 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2078,10 +2078,14 @@ static DecodeStatus DecodeVLDInstruction(llvm::MCInst &Inst, unsigned Insn, case ARM::VLD1d32Twb_register: case ARM::VLD1d64Twb_fixed: case ARM::VLD1d64Twb_register: - case ARM::VLD1d8Q_UPD: - case ARM::VLD1d16Q_UPD: - case ARM::VLD1d32Q_UPD: - case ARM::VLD1d64Q_UPD: + case ARM::VLD1d8Qwb_fixed: + case ARM::VLD1d8Qwb_register: + case ARM::VLD1d16Qwb_fixed: + case ARM::VLD1d16Qwb_register: + case ARM::VLD1d32Qwb_fixed: + case ARM::VLD1d32Qwb_register: + case ARM::VLD1d64Qwb_fixed: + case ARM::VLD1d64Qwb_register: case ARM::VLD2d8_UPD: case ARM::VLD2d16_UPD: case ARM::VLD2d32_UPD: |
