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| author | Johnny Chen <johnny.chen@apple.com> | 2011-04-01 20:21:38 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2011-04-01 20:21:38 +0000 |
| commit | 3dfb80afbf8359ebd909ec021355acf312ea05ec (patch) | |
| tree | 25fc11e7ff42813ccbcc486d07ece6fc4e899b25 /llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | |
| parent | ac2d5657a6946913596c90090e7b925245265310 (diff) | |
| download | bcm5719-llvm-3dfb80afbf8359ebd909ec021355acf312ea05ec.tar.gz bcm5719-llvm-3dfb80afbf8359ebd909ec021355acf312ea05ec.zip | |
Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we should reject the instruction
as invalid.
llvm-svn: 128734
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index c28f7e12efb..884a056ef5d 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -1106,6 +1106,14 @@ static bool DisassembleLdStFrm(MCInst &MI, unsigned Opcode, uint32_t insn, MI.addOperand(MCOperand::CreateImm(Offset)); OpIdx += 1; } else { + // The opcode ARM::LDRT actually corresponds to both Encoding A1 and A2 of + // A8.6.86 LDRT. So if Inst{4} != 0 while Inst{25} (getIBit(insn)) == 1, + // we should reject this insn as invalid. + // + // Ditto for LDRBT. + if ((Opcode == ARM::LDRT || Opcode == ARM::LDRBT) && (slice(insn,4,4) == 1)) + return false; + // Disassemble the offset reg (Rm), shift type, and immediate shift length. MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B, ARM::GPRRegClassID, decodeRm(insn)))); |
