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authorJohnny Chen <johnny.chen@apple.com>2011-04-05 19:42:11 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-04-05 19:42:11 +0000
commit151582492d24b94356b7489b0cb2685a57b5c473 (patch)
tree34eca69bd460c837d8f6c78ba14e48c64b30a902 /llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
parent40d388c25e28cdb4644e4f2b340600da717e6d8e (diff)
downloadbcm5719-llvm-151582492d24b94356b7489b0cb2685a57b5c473.tar.gz
bcm5719-llvm-151582492d24b94356b7489b0cb2685a57b5c473.zip
ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error.
llvm-svn: 128913
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp12
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
index 993ff7302f6..cc7f0d6e60c 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
@@ -82,8 +82,16 @@ const char *ARMUtils::OpcodeName(unsigned Opcode) {
// FIXME: Auto-gened?
static unsigned
getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister) {
- // For this purpose, we can treat rGPR as if it were GPR.
- if (RegClassID == ARM::rGPRRegClassID) RegClassID = ARM::GPRRegClassID;
+ if (RegClassID == ARM::rGPRRegClassID) {
+ // Check for The register numbers 13 and 15 that are not permitted for many
+ // Thumb register specifiers.
+ if (RawRegister == 13 || RawRegister == 15) {
+ B->SetErr(-1);
+ return 0;
+ }
+ // For this purpose, we can treat rGPR as if it were GPR.
+ RegClassID = ARM::GPRRegClassID;
+ }
// See also decodeNEONRd(), decodeNEONRn(), decodeNEONRm().
unsigned RegNum =
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