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| author | Daniel Dunbar <daniel@zuster.org> | 2011-01-18 05:34:24 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2011-01-18 05:34:24 +0000 |
| commit | f5164f40c5ba64745988f9aad460249bf33f3259 (patch) | |
| tree | 5fda830b854db0f471eef9589112b34d36a708ee /llvm/lib/Target/ARM/AsmParser | |
| parent | 1d5e9549654807a8f91478bf9eab97cd8977bd35 (diff) | |
| download | bcm5719-llvm-f5164f40c5ba64745988f9aad460249bf33f3259.tar.gz bcm5719-llvm-f5164f40c5ba64745988f9aad460249bf33f3259.zip | |
McARM: Unify ParseMemory() successfull return.
llvm-svn: 123740
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 62 |
1 files changed, 22 insertions, 40 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 08f3a90d1cf..c2e8442026b 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -720,17 +720,19 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { bool OffsetIsReg = false; bool Negative = false; bool Writeback = false; + ARMOperand *WBOp = 0; + int OffsetRegNum = -1; + bool OffsetRegShifted = false; + enum ShiftType ShiftType = Lsl; + const MCExpr *ShiftAmount = 0; + const MCExpr *Offset = 0; // First look for preindexed address forms, that is after the "[Rn" we now // have to see if the next token is a comma. if (Tok.is(AsmToken::Comma)) { Preindexed = true; Parser.Lex(); // Eat comma token. - int OffsetRegNum; - bool OffsetRegShifted; - enum ShiftType ShiftType; - const MCExpr *ShiftAmount = 0; - const MCExpr *Offset = 0; + if (ParseMemoryOffsetReg(Negative, OffsetRegShifted, ShiftType, ShiftAmount, Offset, OffsetIsReg, OffsetRegNum, E)) return true; @@ -743,29 +745,12 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { Parser.Lex(); // Eat right bracket token. const AsmToken &ExclaimTok = Parser.getTok(); - ARMOperand *WBOp = 0; if (ExclaimTok.is(AsmToken::Exclaim)) { WBOp = ARMOperand::CreateToken(ExclaimTok.getString(), ExclaimTok.getLoc()); Writeback = true; Parser.Lex(); // Eat exclaim token } - - // Force Offset to exist if used. - if (!OffsetIsReg) { - if (!Offset) - Offset = MCConstantExpr::Create(0, getContext()); - } - - Operands.push_back(ARMOperand::CreateMem(BaseRegNum, OffsetIsReg, Offset, - OffsetRegNum, OffsetRegShifted, - ShiftType, ShiftAmount, Preindexed, - Postindexed, Negative, Writeback, - S, E)); - if (WBOp) - Operands.push_back(WBOp); - - return false; } else { // The "[Rn" we have so far was not followed by a comma. @@ -774,12 +759,6 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { E = Tok.getLoc(); Parser.Lex(); // Eat right bracket token. - int OffsetRegNum = -1; - bool OffsetRegShifted = false; - enum ShiftType ShiftType = Lsl; - const MCExpr *ShiftAmount = 0; - const MCExpr *Offset = 0; - const AsmToken &NextTok = Parser.getTok(); if (NextTok.isNot(AsmToken::EndOfStatement)) { @@ -798,20 +777,23 @@ ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { E)) return true; } + } - // Force Offset to exist if used. - if (!OffsetIsReg) { - if (!Offset) - Offset = MCConstantExpr::Create(0, getContext()); - } - - Operands.push_back(ARMOperand::CreateMem(BaseRegNum, OffsetIsReg, Offset, - OffsetRegNum, OffsetRegShifted, - ShiftType, ShiftAmount, Preindexed, - Postindexed, Negative, Writeback, - S, E)); - return false; + // Force Offset to exist if used. + if (!OffsetIsReg) { + if (!Offset) + Offset = MCConstantExpr::Create(0, getContext()); } + + Operands.push_back(ARMOperand::CreateMem(BaseRegNum, OffsetIsReg, Offset, + OffsetRegNum, OffsetRegShifted, + ShiftType, ShiftAmount, Preindexed, + Postindexed, Negative, Writeback, + S, E)); + if (WBOp) + Operands.push_back(WBOp); + + return false; } /// Parse the offset of a memory operand after we have seen "[Rn," or "[Rn]," |

