diff options
author | Reid Kleckner <rnk@google.com> | 2018-01-05 19:53:51 +0000 |
---|---|---|
committer | Reid Kleckner <rnk@google.com> | 2018-01-05 19:53:51 +0000 |
commit | 5619669a5abeea98dd5640b615c13838b21e3d50 (patch) | |
tree | b351ddc7e1b7674cd09cacd36c9c0b6bbb90a347 /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
parent | 4c975578b42a3adcfa5f7d08d67feff589f03398 (diff) | |
download | bcm5719-llvm-5619669a5abeea98dd5640b615c13838b21e3d50.tar.gz bcm5719-llvm-5619669a5abeea98dd5640b615c13838b21e3d50.zip |
Fix -Wsign-compare warnings on Windows
These arise because enums are 'int' by default.
llvm-svn: 321887
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index ff7376db878..55a73ff537c 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -6250,7 +6250,8 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst, // The instruction must be predicable. if (!MCID.isPredicable()) return Error(Loc, "instructions in IT block must be predicable"); - unsigned Cond = Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm(); + ARMCC::CondCodes Cond = ARMCC::CondCodes( + Inst.getOperand(MCID.findFirstPredOperandIdx()).getImm()); if (Cond != currentITCond()) { // Find the condition code Operand to get its SMLoc information. SMLoc CondLoc; @@ -6258,9 +6259,9 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst, if (static_cast<ARMOperand &>(*Operands[I]).isCondCode()) CondLoc = Operands[I]->getStartLoc(); return Error(CondLoc, "incorrect condition in IT block; got '" + - StringRef(ARMCondCodeToString(ARMCC::CondCodes(Cond))) + - "', but expected '" + - ARMCondCodeToString(ARMCC::CondCodes(currentITCond())) + "'"); + StringRef(ARMCondCodeToString(Cond)) + + "', but expected '" + + ARMCondCodeToString(currentITCond()) + "'"); } // Check for non-'al' condition codes outside of the IT block. } else if (isThumbTwo() && MCID.isPredicable() && |