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| author | Diana Picus <diana.picus@linaro.org> | 2017-02-28 09:35:10 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-02-28 09:35:10 +0000 |
| commit | 566a15d7492799a1fcf3ab2e2b8e5c9144cab717 (patch) | |
| tree | 3938d088dcae1fb4c76bfd9365a26e378f48326c /llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | |
| parent | 8723946e91b7e1928568e01401b95d0ebb7e8f7f (diff) | |
| download | bcm5719-llvm-566a15d7492799a1fcf3ab2e2b8e5c9144cab717.tar.gz bcm5719-llvm-566a15d7492799a1fcf3ab2e2b8e5c9144cab717.zip | |
[ARM] GlobalISel: Add reg bank mapping for G_GEP
This should be the same as the mapping for G_ADD etc.
llvm-svn: 296455
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index 8a53e719c36..2d512428d6e 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -220,6 +220,7 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case G_ADD: case G_SEXT: case G_ZEXT: + case G_GEP: // FIXME: We're abusing the fact that everything lives in a GPR for now; in // the real world we would use different mappings. OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; |
