From 566a15d7492799a1fcf3ab2e2b8e5c9144cab717 Mon Sep 17 00:00:00 2001 From: Diana Picus Date: Tue, 28 Feb 2017 09:35:10 +0000 Subject: [ARM] GlobalISel: Add reg bank mapping for G_GEP This should be the same as the mapping for G_ADD etc. llvm-svn: 296455 --- llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp') diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index 8a53e719c36..2d512428d6e 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -220,6 +220,7 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case G_ADD: case G_SEXT: case G_ZEXT: + case G_GEP: // FIXME: We're abusing the fact that everything lives in a GPR for now; in // the real world we would use different mappings. OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; -- cgit v1.2.3