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| author | Diana Picus <diana.picus@linaro.org> | 2017-12-22 13:05:51 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-12-22 13:05:51 +0000 |
| commit | 28a6d0e6396b093c9d63ff3c7bf2a90abe29614f (patch) | |
| tree | acae45acb5902954651b503bf12f2af9fbaf7b04 /llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | |
| parent | deb45f2043a5e0d1d6644df31f98efd3cfda03ae (diff) | |
| download | bcm5719-llvm-28a6d0e6396b093c9d63ff3c7bf2a90abe29614f.tar.gz bcm5719-llvm-28a6d0e6396b093c9d63ff3c7bf2a90abe29614f.zip | |
[ARM GlobalISel] Support G_INTTOPTR and G_PTRTOINT for s32
Mark conversions between pointers and 32-bit scalars as legal, map them
to the GPR and select to a simple COPY.
llvm-svn: 321356
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index 32d1d57d326..fad0e98285e 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -227,6 +227,8 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case G_ZEXT: case G_ANYEXT: case G_GEP: + case G_INTTOPTR: + case G_PTRTOINT: // FIXME: We're abusing the fact that everything lives in a GPR for now; in // the real world we would use different mappings. OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; |
