summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMInstrThumb2.td
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2009-07-10 01:54:42 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-07-10 01:54:42 +0000
commit0f9cce795147ff72ae9fb4a93e3782db41311116 (patch)
treede89875fc4b635becbc671b60377cc9ba588c964 /llvm/lib/Target/ARM/ARMInstrThumb2.td
parent3b88dd69001c4f335436f6f76a8619f69a0eff64 (diff)
downloadbcm5719-llvm-0f9cce795147ff72ae9fb4a93e3782db41311116.tar.gz
bcm5719-llvm-0f9cce795147ff72ae9fb4a93e3782db41311116.zip
Add a thumb2 pass to insert IT blocks.
llvm-svn: 75218
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrThumb2.td')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb2.td16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index be738310729..34ce53f97f1 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -11,6 +11,16 @@
//
//===----------------------------------------------------------------------===//
+// IT block predicate field
+def it_pred : Operand<i32> {
+ let PrintMethod = "printPredicateOperand";
+}
+
+// IT block condition mask
+def it_mask : Operand<i32> {
+ let PrintMethod = "printThumbITMask";
+}
+
// Shifted operands. No register controlled shifts for Thumb2.
// Note: We do not support rrx shifted operands yet.
def t2_so_reg : Operand<i32>, // reg imm
@@ -1121,6 +1131,12 @@ def t2Bcc : T2I<(outs), (ins brtarget:$target),
"b", " $target",
[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
+
+// IT block
+def t2IT : Thumb2XI<(outs), (ins it_pred:$cc, it_mask:$mask),
+ AddrModeNone, Size2Bytes,
+ "it$mask $cc", "", []>;
+
//===----------------------------------------------------------------------===//
// Non-Instruction Patterns
//
OpenPOWER on IntegriCloud