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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-05-22 04:46:46 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-05-22 04:46:46 +0000 |
| commit | 2bd1262a3299ca9c9ac936df6d17f52858d21ef8 (patch) | |
| tree | 29f9186fa37c0f97ea47a4cf112db958e3d3444f /llvm/lib/Target/ARM/ARMInstrInfo.td | |
| parent | 49a2790fb329c5cf27d9735b97ef70a6760921e4 (diff) | |
| download | bcm5719-llvm-2bd1262a3299ca9c9ac936df6d17f52858d21ef8.tar.gz bcm5719-llvm-2bd1262a3299ca9c9ac936df6d17f52858d21ef8.zip | |
ARM: introduce llvm.arm.undefined intrinsic
This intrinsic permits the emission of platform specific undefined sequences.
ARM has reserved the 0xde opcode which takes a single integer parameter (ignored
by the CPU). This permits the operating system to implement custom behaviour on
this trap. The llvm.arm.undefined intrinsic is meant to provide a means for
generating the target specific behaviour from the frontend. This is
particularly useful for Windows on ARM which has made use of a series of these
special opcodes.
llvm-svn: 209390
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrInfo.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index f642893161c..718d5da9d05 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1969,7 +1969,7 @@ def DBG : AI<(outs), (ins imm0_15:$opt), MiscFrm, NoItinerary, "dbg", "\t$opt", // A8.8.247 UDF - Undefined (Encoding A1) def UDF : AInoP<(outs), (ins imm0_65535:$imm16), MiscFrm, NoItinerary, - "udf", "\t$imm16", []> { + "udf", "\t$imm16", [(int_arm_undefined imm0_65535:$imm16)]> { bits<16> imm16; let Inst{31-28} = 0b1110; // AL let Inst{27-25} = 0b011; |

