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authorDan Gohman <gohman@apple.com>2007-06-26 00:48:07 +0000
committerDan Gohman <gohman@apple.com>2007-06-26 00:48:07 +0000
commite8c1e428f2726db7abb153c743037f70ce59fcbd (patch)
tree79072e9179f66d651d722dc1b13651d95ee642bb /llvm/lib/Target/ARM/ARMInstrInfo.cpp
parent02d1a7844ad30e99a060e7ed551acf68d652e25f (diff)
downloadbcm5719-llvm-e8c1e428f2726db7abb153c743037f70ce59fcbd.tar.gz
bcm5719-llvm-e8c1e428f2726db7abb153c743037f70ce59fcbd.zip
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function hook for targets to override if there are instructions that are only trivially rematerializable with specific operands (i.e. constant pool loads). llvm-svn: 37728
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.cpp14
1 files changed, 0 insertions, 14 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
index a1e02581cd0..1370faba4d7 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
@@ -130,20 +130,6 @@ unsigned ARMInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) con
return 0;
}
-bool ARMInstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const {
- switch (MI->getOpcode()) {
- default: break;
- case ARM::LDRcp:
- case ARM::MOVi:
- case ARM::MVNi:
- case ARM::MOVi2pieces:
- case ARM::tLDRcp:
- // These instructions are always trivially rematerializable.
- return true;
- }
- return false;
-}
-
static unsigned getUnindexedOpcode(unsigned Opc) {
switch (Opc) {
default: break;
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