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authorDan Gohman <gohman@apple.com>2009-02-18 05:45:50 +0000
committerDan Gohman <gohman@apple.com>2009-02-18 05:45:50 +0000
commit2af1f85f1fefa0dba1aeea50507e6977763b6309 (patch)
tree74793c1ef283607393b2c200103c513739f97ed4 /llvm/lib/Target/ARM/ARMInstrInfo.cpp
parentc2c0bdb880cf51017c976326a166e5c0b7c52eb0 (diff)
downloadbcm5719-llvm-2af1f85f1fefa0dba1aeea50507e6977763b6309.tar.gz
bcm5719-llvm-2af1f85f1fefa0dba1aeea50507e6977763b6309.zip
Factor out the code to add a MachineOperand to a MachineInstrBuilder.
llvm-svn: 64891
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.cpp22
1 files changed, 4 insertions, 18 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
index 9dc0785789b..3277896f74a 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
@@ -509,20 +509,6 @@ bool ARMInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
return true;
}
-static const MachineInstrBuilder &ARMInstrAddOperand(MachineInstrBuilder &MIB,
- MachineOperand &MO) {
- if (MO.isReg())
- MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
- else if (MO.isImm())
- MIB = MIB.addImm(MO.getImm());
- else if (MO.isFI())
- MIB = MIB.addFrameIndex(MO.getIndex());
- else
- assert(0 && "Unknown operand for ARMInstrAddOperand!");
-
- return MIB;
-}
-
void ARMInstrInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SrcReg, bool isKill, int FI,
@@ -567,7 +553,7 @@ void ARMInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
MachineInstrBuilder MIB =
BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
- MIB = ARMInstrAddOperand(MIB, Addr[i]);
+ MIB.addOperand(Addr[i]);
NewMIs.push_back(MIB);
return;
}
@@ -582,7 +568,7 @@ void ARMInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
MachineInstrBuilder MIB =
BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
- MIB = ARMInstrAddOperand(MIB, Addr[i]);
+ MIB.addOperand(Addr[i]);
AddDefaultPred(MIB);
NewMIs.push_back(MIB);
return;
@@ -626,7 +612,7 @@ void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
Opc = Addr[0].isFI() ? ARM::tRestore : ARM::tLDR;
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
- MIB = ARMInstrAddOperand(MIB, Addr[i]);
+ MIB.addOperand(Addr[i]);
NewMIs.push_back(MIB);
return;
}
@@ -640,7 +626,7 @@ void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
- MIB = ARMInstrAddOperand(MIB, Addr[i]);
+ MIB.addOperand(Addr[i]);
AddDefaultPred(MIB);
NewMIs.push_back(MIB);
return;
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