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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-26 22:37:02 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-26 22:37:02 +0000 |
| commit | 1e4d9a17c21fd5c9908024df450bae31d160ebd3 (patch) | |
| tree | 4afd47f1dcc562f1c72fd6af47a687555baebb62 /llvm/lib/Target/ARM/ARMInstrInfo.cpp | |
| parent | e4f3317cdaacdf5dadbcf0afb4940af311588e19 (diff) | |
| download | bcm5719-llvm-1e4d9a17c21fd5c9908024df450bae31d160ebd3.tar.gz bcm5719-llvm-1e4d9a17c21fd5c9908024df450bae31d160ebd3.zip | |
First part of refactoring ARM addrmode2 (load/store) instructions to be more
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.
llvm-svn: 117409
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp index ba228ffac8e..671b8e0a8d1 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp @@ -33,7 +33,7 @@ unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const { default: break; case ARM::LDR_PRE: case ARM::LDR_POST: - return ARM::LDR; + return ARM::LDRi12; case ARM::LDRH_PRE: case ARM::LDRH_POST: return ARM::LDRH; |
