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authorLang Hames <lhames@gmail.com>2012-03-15 18:49:02 +0000
committerLang Hames <lhames@gmail.com>2012-03-15 18:49:02 +0000
commitc35ee8b54ad0778814266e899598e2df4d6feb70 (patch)
treee004298edc19668e16b77b56427275ed5b684f10 /llvm/lib/Target/ARM/ARMISelLowering.h
parenta15f816e3a1e76427b6b470aef3d93b99fd40a47 (diff)
downloadbcm5719-llvm-c35ee8b54ad0778814266e899598e2df4d6feb70.tar.gz
bcm5719-llvm-c35ee8b54ad0778814266e899598e2df4d6feb70.zip
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
register allocation by allowing all 32 D-registers to be used. Patch by Cameron Zwarich. llvm-svn: 152824
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.h')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 7f122935260..b46abda94b6 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -434,6 +434,8 @@ namespace llvm {
SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
+ SDValue LowerConstantFP(SDValue Op, SelectionDAG &DAG,
+ const ARMSubtarget *ST) const;
SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
const ARMSubtarget *ST) const;
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