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author | Oliver Stannard <oliver.stannard@arm.com> | 2014-05-09 14:01:47 +0000 |
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committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-05-09 14:01:47 +0000 |
commit | c24f2171ca2fc8c7e16cd0a3a6c38f63a49caedd (patch) | |
tree | 4288023ced772e2b3d322ac323536ea3aaee7e71 /llvm/lib/Target/ARM/ARMISelLowering.h | |
parent | d6a20e51156edff69d9f71697b01ef3acccad822 (diff) | |
download | bcm5719-llvm-c24f2171ca2fc8c7e16cd0a3a6c38f63a49caedd.tar.gz bcm5719-llvm-c24f2171ca2fc8c7e16cd0a3a6c38f63a49caedd.zip |
ARM: HFAs must be passed in consecutive registers
When using the ARM AAPCS, HFAs (Homogeneous Floating-point Aggregates) must
be passed in a block of consecutive floating-point registers, or on the stack.
This means that unused floating-point registers cannot be back-filled with
part of an HFA, however this can currently happen. This patch, along with the
corresponding clang patch (http://reviews.llvm.org/D3083) prevents this.
llvm-svn: 208413
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.h')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h index cff7a9799a8..305d23cf58a 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.h +++ b/llvm/lib/Target/ARM/ARMISelLowering.h @@ -384,6 +384,11 @@ namespace llvm { bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const override; + /// \brief Returns true if an argument of type Ty needs to be passed in a + /// contiguous block of registers in calling convention CallConv. + bool functionArgumentNeedsConsecutiveRegisters( + Type *Ty, CallingConv::ID CallConv, bool isVarArg) const override; + Value *emitLoadLinked(IRBuilder<> &Builder, Value *Addr, AtomicOrdering Ord) const override; Value *emitStoreConditional(IRBuilder<> &Builder, Value *Val, @@ -424,6 +429,8 @@ namespace llvm { SDValue &Root, SelectionDAG &DAG, SDLoc dl) const; + CallingConv::ID getEffectiveCallingConv(CallingConv::ID CC, + bool isVarArg) const; CCAssignFn *CCAssignFnForNode(CallingConv::ID CC, bool Return, bool isVarArg) const; SDValue LowerMemOpCallTo(SDValue Chain, SDValue StackPtr, SDValue Arg, @@ -577,7 +584,6 @@ namespace llvm { OtherModImm }; - namespace ARM { FastISel *createFastISel(FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo); |