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authorJames Molloy <james.molloy@arm.com>2015-11-10 14:22:05 +0000
committerJames Molloy <james.molloy@arm.com>2015-11-10 14:22:05 +0000
commit9d55f19cfa69fbd4a85d5207a4e30c67cec9df89 (patch)
tree3f0c91378a33e99ae9e8651f58fa0b88bc591222 /llvm/lib/Target/ARM/ARMISelLowering.h
parentc78e89962a64879a6967e4434c4e64747b3d3e4b (diff)
downloadbcm5719-llvm-9d55f19cfa69fbd4a85d5207a4e30c67cec9df89.tar.gz
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Reapply "[ARM] Combine CMOV into BFI where possible"
Added fixes for stage2 failures: CMOV is not commutable; commuting the operands results in the condition being flipped! d'oh! Original commit message: If we have a CMOV, OR and AND combination such as: if (x & CN) y |= CM; And: * CN is a single bit; * All bits covered by CM are known zero in y; Then we can convert this to a sequence of BFI instructions. This will always be a win if CM is a single bit, will always be no worse than the TST & OR sequence if CM is two bits, and for thumb will be no worse if CM is three bits (due to the extra IT instruction). llvm-svn: 252606
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.h')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index df4b6553ab5..534f92b941c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -260,6 +260,7 @@ namespace llvm {
SDNode *Node) const override;
SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
+ SDValue PerformCMOVToBFICombine(SDNode *N, SelectionDAG &DAG) const;
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
bool isDesirableToTransformToIntegerOp(unsigned Opc, EVT VT) const override;
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