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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-02 23:07:20 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-02 23:07:20 +0000
commit75703ca76f57b604ca517d4fc765ea4db074296a (patch)
treef2c6c9e33e7000cedb41bdccfe5e51ebf181a002 /llvm/lib/Target/ARM/ARMISelLowering.h
parent8a71c0b771527e7f94a37b17f376ab40daa43c75 (diff)
downloadbcm5719-llvm-75703ca76f57b604ca517d4fc765ea4db074296a.tar.gz
bcm5719-llvm-75703ca76f57b604ca517d4fc765ea4db074296a.zip
Make it possible to have unallocatable register classes.
Some register classes are only used for instruction operand constraints. They should never be used for virtual registers. Previously, those register classes were given an empty allocation order, but now you can say 'let isAllocatable=0' in the register class definition. TableGen calculates if a register is part of any allocatable register class, and makes that information available in TargetRegisterDesc::inAllocatableClass. The goal here is to eliminate use cases for overriding allocation_order_* methods. llvm-svn: 132508
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.h')
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