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authorDaniel Sanders <daniel.sanders@imgtec.com>2015-06-03 12:33:56 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2015-06-03 12:33:56 +0000
commit1f58ef71ea400d52cb8be5cfdc0bfd20e1389ce5 (patch)
treef006500a2c0cdafbf36697c2204931c0b81e8f13 /llvm/lib/Target/ARM/ARMISelLowering.h
parent86224fe468d0fb5e74a20e3f4fe9eb8ffd54e8e4 (diff)
downloadbcm5719-llvm-1f58ef71ea400d52cb8be5cfdc0bfd20e1389ce5.tar.gz
bcm5719-llvm-1f58ef71ea400d52cb8be5cfdc0bfd20e1389ce5.zip
[arm] Distinguish the /U[qytnms]/, 'Uv', 'Q', and 'm' inline assembly memory constraints.
Summary: But still handle them the same way since I don't know how they differ on this target. Of these, /U[qytnms]/ do not have backend tests but are accepted by clang. No functional change intended. Reviewers: t.p.northover Reviewed By: t.p.northover Subscribers: t.p.northover, aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D8203 llvm-svn: 238921
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.h')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.h27
1 files changed, 25 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 88b36e28582..94b6ec62214 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -351,8 +351,31 @@ namespace llvm {
unsigned getInlineAsmMemConstraint(
const std::string &ConstraintCode) const override {
- // FIXME: Map different constraints differently.
- return InlineAsm::Constraint_m;
+ if (ConstraintCode == "Q")
+ return InlineAsm::Constraint_Q;
+ else if (ConstraintCode.size() == 2) {
+ if (ConstraintCode[0] == 'U') {
+ switch(ConstraintCode[1]) {
+ default:
+ break;
+ case 'm':
+ return InlineAsm::Constraint_Um;
+ case 'n':
+ return InlineAsm::Constraint_Un;
+ case 'q':
+ return InlineAsm::Constraint_Uq;
+ case 's':
+ return InlineAsm::Constraint_Us;
+ case 't':
+ return InlineAsm::Constraint_Ut;
+ case 'v':
+ return InlineAsm::Constraint_Uv;
+ case 'y':
+ return InlineAsm::Constraint_Uy;
+ }
+ }
+ }
+ return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
}
const ARMSubtarget* getSubtarget() const {
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