diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-05-08 10:37:34 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-05-08 10:37:34 +0000 |
| commit | f5ca255d18359bb9fc3c2ddd54b0ed2ee2bdc0a6 (patch) | |
| tree | 88bf68c82893d3d41c78afe7bdecf9155e2bf768 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | fd4c158a841613dfc3f2798bd4b8bb58a187cce7 (diff) | |
| download | bcm5719-llvm-f5ca255d18359bb9fc3c2ddd54b0ed2ee2bdc0a6.tar.gz bcm5719-llvm-f5ca255d18359bb9fc3c2ddd54b0ed2ee2bdc0a6.zip | |
[ARM][NEON] Add support for ISD::ABS lowering
Update NEON int_arm_neon_vabs intrinsic to use the ISD::ABS opcode directly
Added constant folding tests.
Differential Revision: https://reviews.llvm.org/D32938
llvm-svn: 302417
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index bbf5b6665e6..e64582402fe 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -202,7 +202,7 @@ void ARMTargetLowering::addTypeForNEON(MVT VT, MVT PromotedLdStVT, if (!VT.isFloatingPoint() && VT != MVT::v2i64 && VT != MVT::v1i64) - for (unsigned Opcode : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) + for (auto Opcode : {ISD::ABS, ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) setOperationAction(Opcode, VT, Legal); } @@ -3316,6 +3316,9 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, } return Result; } + case Intrinsic::arm_neon_vabs: + return DAG.getNode(ISD::ABS, SDLoc(Op), Op.getValueType(), + Op.getOperand(1)); case Intrinsic::arm_neon_vmulls: case Intrinsic::arm_neon_vmullu: { unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vmulls) |
