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authorSam Parker <sam.parker@arm.com>2016-10-27 09:47:10 +0000
committerSam Parker <sam.parker@arm.com>2016-10-27 09:47:10 +0000
commite7d9505c08017b6952c5f32015d185b5819094bc (patch)
tree64a8152ce59df070b5690e48d5643018eab34e9f /llvm/lib/Target/ARM/ARMISelLowering.cpp
parent188ad3ac02d06cab3ca13241196a3e110f845439 (diff)
downloadbcm5719-llvm-e7d9505c08017b6952c5f32015d185b5819094bc.tar.gz
bcm5719-llvm-e7d9505c08017b6952c5f32015d185b5819094bc.zip
[ARM] Predicate UMAAL selection on hasDSP.
UMAAL is a DSP instruction and it is not available on thumbv7m (Cortex-M3) and thumbv6m (Cortex-M0+1) targets. Also fix wrong CHECK prefix in longMAC.ll test. Patch by Vadzim Dambrouski. Differential Revision: https://reviews.llvm.org/D25890 llvm-svn: 285278
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index dcbf3c5e513..7d89319b19a 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -9354,7 +9354,7 @@ static SDValue AddCombineTo64bitUMAAL(SDNode *AddcNode,
// be combined into a UMLAL. The other pattern is AddcNode being combined
// into an UMLAL and then using another addc is handled in ISelDAGToDAG.
- if (!Subtarget->hasV6Ops() ||
+ if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP() ||
(Subtarget->isThumb() && !Subtarget->hasThumb2()))
return AddCombineTo64bitMLAL(AddcNode, DCI, Subtarget);
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