summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
diff options
context:
space:
mode:
authorManman Ren <manman.ren@gmail.com>2016-01-15 20:24:11 +0000
committerManman Ren <manman.ren@gmail.com>2016-01-15 20:24:11 +0000
commite5f807f92860d4fea483d42b6f2c6273b456a778 (patch)
tree35aa6cbd4bf78980a9ba817e65c70a74c1461bff /llvm/lib/Target/ARM/ARMISelLowering.cpp
parent4632e8e62574f87f5c470328027d3afacff6390e (diff)
downloadbcm5719-llvm-e5f807f92860d4fea483d42b6f2c6273b456a778.tar.gz
bcm5719-llvm-e5f807f92860d4fea483d42b6f2c6273b456a778.zip
CXX_FAST_TLS calling convention: fix issue on ARM.
When we have a single basic block, the explicit copy-back instructions should be inserted right before the terminator. Before this fix, they were wrongly placed at the beginning of the basic block. PR26136 llvm-svn: 257930
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index bca26e68cb1..3fb50051f31 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -12425,6 +12425,7 @@ void ARMTargetLowering::insertCopiesSplitCSR(
const TargetInstrInfo *TII = Subtarget->getInstrInfo();
MachineRegisterInfo *MRI = &Entry->getParent()->getRegInfo();
+ MachineBasicBlock::iterator MBBI = Entry->begin();
for (const MCPhysReg *I = IStart; *I; ++I) {
const TargetRegisterClass *RC = nullptr;
if (ARM::GPRRegClass.contains(*I))
@@ -12444,13 +12445,13 @@ void ARMTargetLowering::insertCopiesSplitCSR(
Attribute::NoUnwind) &&
"Function should be nounwind in insertCopiesSplitCSR!");
Entry->addLiveIn(*I);
- BuildMI(*Entry, Entry->begin(), DebugLoc(), TII->get(TargetOpcode::COPY),
- NewVR)
+ BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR)
.addReg(*I);
+ // Insert the copy-back instructions right before the terminator.
for (auto *Exit : Exits)
- BuildMI(*Exit, Exit->begin(), DebugLoc(), TII->get(TargetOpcode::COPY),
- *I)
+ BuildMI(*Exit, Exit->getFirstTerminator(), DebugLoc(),
+ TII->get(TargetOpcode::COPY), *I)
.addReg(NewVR);
}
}
OpenPOWER on IntegriCloud