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author | Robin Morisset <morisset@google.com> | 2014-09-17 18:09:13 +0000 |
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committer | Robin Morisset <morisset@google.com> | 2014-09-17 18:09:13 +0000 |
commit | bf26f8fd567274d09ba49c41d2296a8f97c88546 (patch) | |
tree | 12a6c6dc6307130745716da9f2d016bd7732f1d7 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
parent | d8e30c0db81ee898a47f37e9673097d9b4a3314f (diff) | |
download | bcm5719-llvm-bf26f8fd567274d09ba49c41d2296a8f97c88546.tar.gz bcm5719-llvm-bf26f8fd567274d09ba49c41d2296a8f97c88546.zip |
Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"
It is breaking the build on the buildbots but works fine on my machine, I revert
while trying to understand what happens (it appears to depend on the compiler used
to build, I probably used a C++11 feature that is not perfectly supported by some
of the buildbots).
This reverts commit feb3176c4d006f99af8b40373abd56215a90e7cc.
llvm-svn: 217973
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 30 |
1 files changed, 4 insertions, 26 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index b41d1e3e97a..4195b3bf0a4 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -10984,33 +10984,11 @@ bool ARMTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm, bool ARMTargetLowering::hasLoadLinkedStoreConditional() const { return true; } -Instruction* ARMTargetLowering::makeDMB(IRBuilder<> &Builder, - ARM_MB::MemBOpt Domain) const { +static void makeDMB(IRBuilder<> &Builder, ARM_MB::MemBOpt Domain) { Module *M = Builder.GetInsertBlock()->getParent()->getParent(); - - // First, if the target has no DMB, see what fallback we can use. - if (!Subtarget->hasDataBarrier()) { - // Some ARMv6 cpus can support data barriers with an mcr instruction. - // Thumb1 and pre-v6 ARM mode use a libcall instead and should never get - // here. - if (Subtarget->hasV6Ops() && !Subtarget->isThumb()) { - Function *MCR = llvm::Intrinsic::getDeclaration(M, Intrinsic::arm_mcr); - ArrayRef<Value*> args = {Builder.getInt32(15), Builder.getInt32(0), - Builder.getInt32(0), Builder.getInt32(7), - Builder.getInt32(10), Builder.getInt32(5)}; - return Builder.CreateCall(MCR, args); - } else { - // Instead of using barriers, atomic accesses on these subtargets use - // libcalls. - llvm_unreachable("makeDMB on a target so old that it has no barriers"); - } - } else { - Function *DMB = llvm::Intrinsic::getDeclaration(M, Intrinsic::arm_dmb); - // Only a full system barrier exists in the M-class architectures. - Domain = Subtarget->isMClass() ? ARM_MB::SY : Domain; - Constant *CDomain = Builder.getInt32(Domain); - return Builder.CreateCall(DMB, CDomain); - } + Function *DMB = llvm::Intrinsic::getDeclaration(M, Intrinsic::arm_dmb); + Constant *CDomain = Builder.getInt32(Domain); + Builder.CreateCall(DMB, CDomain); } // Based on http://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html |