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| author | Gadi Haber <gadi.haber@intel.com> | 2017-08-13 13:59:24 +0000 |
|---|---|---|
| committer | Gadi Haber <gadi.haber@intel.com> | 2017-08-13 13:59:24 +0000 |
| commit | bed2c506072d1e5878250e596ddcce89978ac9be (patch) | |
| tree | 9b0e73e2b562abaea2307e727792dd546a669099 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | 631991fdde08818c2e967390a223f2b247297a5e (diff) | |
| download | bcm5719-llvm-bed2c506072d1e5878250e596ddcce89978ac9be.tar.gz bcm5719-llvm-bed2c506072d1e5878250e596ddcce89978ac9be.zip | |
[X86][SandyBridge] Additional updates to the SNB instructions scheduling information
This is a continuation patch for commit r307529 which completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target (see also https://reviews.llvm.org/D35019).
In this patch we added the scheduling information of additional SNB instructions that were missing from the patch commit r307529, fixed the scheduling of several resource groups that include only port0 instead of port05 (i.e., port0 OR port5) and fixed several incorrect instructions' scheduling in the r307529 commit.
The patch also includes the X87 instructions which were missing in previous patch commit r307529 as reported in bugzilla bug 34080.
Reviewers: zvi, RKSimon, chandlerc, igorb, m_zuckerman, craig.topper, aymanmus, dim
Differential Revision: https://reviews.llvm.org/D36388
llvm-svn: 310792
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions
