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authorSjoerd Meijer <sjoerd.meijer@arm.com>2018-02-01 13:48:40 +0000
committerSjoerd Meijer <sjoerd.meijer@arm.com>2018-02-01 13:48:40 +0000
commit9d9a86535e9949a04352ac51e4cc5a933fb73a72 (patch)
tree81e6b3cd55d3389bd8169f62ff7cbd0397387e34 /llvm/lib/Target/ARM/ARMISelLowering.cpp
parenta8d12bbc3fae40f20f87a94c400176110ac7d51b (diff)
downloadbcm5719-llvm-9d9a86535e9949a04352ac51e4cc5a933fb73a72.tar.gz
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[ARM] FullFP16 LowerReturn Fix
Commit r323512 introduced an optimisation in LowerReturn for half-precision return values. A missing check caused a crash when the return value is "undef" (i.e. a node that has no operands). Differential Revision: https://reviews.llvm.org/D42743 llvm-svn: 323968
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index cddd957417e..8e58bd330ac 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2491,12 +2491,12 @@ ARMTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
// t11 f16 = fadd ...
// t12: i16 = bitcast t11
// t13: i32 = zero_extend t12
- // t14: f32 = bitcast t13
+ // t14: f32 = bitcast t13 <~~~~~~~ Arg
//
// to avoid code generation for bitcasts, we simply set Arg to the node
// that produces the f16 value, t11 in this case.
//
- if (Arg.getValueType() == MVT::f32) {
+ if (Arg.getValueType() == MVT::f32 && Arg.getOpcode() == ISD::BITCAST) {
SDValue ZE = Arg.getOperand(0);
if (ZE.getOpcode() == ISD::ZERO_EXTEND && ZE.getValueType() == MVT::i32) {
SDValue BC = ZE.getOperand(0);
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