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authorMatthias Braun <matze@braunis.de>2016-04-04 18:56:13 +0000
committerMatthias Braun <matze@braunis.de>2016-04-04 18:56:13 +0000
commit870c34f0cfe0678dedcec33770fe4304b60c2e0c (patch)
tree46113c7f1c7c847dcceddbb570c39e0262fd6f7b /llvm/lib/Target/ARM/ARMISelLowering.cpp
parenteb3219a9c23444361172f9840f2338cc5de0152d (diff)
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ARM, AArch64, X86: Check preserved registers for tail calls.
We can only perform a tail call to a callee that preserves all the registers that the caller needs to preserve. This situation happens with calling conventions like preserver_mostcc or cxx_fast_tls. It was explicitely handled for fast_tls and failing for preserve_most. This patch generalizes the check to any calling convention. Related to rdar://24207743 Differential Revision: http://reviews.llvm.org/D18680 llvm-svn: 265329
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp15
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 908f40db587..f950adb9159 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2101,14 +2101,6 @@ ARMTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
MachineFunction &MF = DAG.getMachineFunction();
const Function *CallerF = MF.getFunction();
CallingConv::ID CallerCC = CallerF->getCallingConv();
- bool CCMatch = CallerCC == CalleeCC;
-
- // Disable tailcall for CXX_FAST_TLS when callee and caller have different
- // calling conventions, given that CXX_FAST_TLS has a bigger CSR set.
- if (!CCMatch &&
- (CallerCC == CallingConv::CXX_FAST_TLS ||
- CalleeCC == CallingConv::CXX_FAST_TLS))
- return false;
assert(Subtarget->supportsTailCall());
@@ -2152,6 +2144,13 @@ ARMTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
CCAssignFnForNode(CalleeCC, true, isVarArg),
CCAssignFnForNode(CallerCC, true, isVarArg)))
return false;
+ // The callee has to preserve all registers the caller needs to preserve.
+ if (CalleeCC != CallerCC) {
+ const ARMBaseRegisterInfo *TRI = Subtarget->getRegisterInfo();
+ if (!TRI->regmaskSubsetEqual(TRI->getCallPreservedMask(MF, CallerCC),
+ TRI->getCallPreservedMask(MF, CalleeCC)))
+ return false;
+ }
// If Caller's vararg or byval argument has been split between registers and
// stack, do not perform tail call, since part of the argument is in caller's
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