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| author | Bernard Ogden <bogden@arm.com> | 2016-08-02 10:04:03 +0000 |
|---|---|---|
| committer | Bernard Ogden <bogden@arm.com> | 2016-08-02 10:04:03 +0000 |
| commit | 849f73715581424a16df50fe99737656326ff0b7 (patch) | |
| tree | 6251f7349643e8f3078a4b0b7d52376bbeef381a /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | aaec9b6cfce2e492cac2fd79687f0fab9bd8a9af (diff) | |
| download | bcm5719-llvm-849f73715581424a16df50fe99737656326ff0b7.tar.gz bcm5719-llvm-849f73715581424a16df50fe99737656326ff0b7.zip | |
[ARM] Some saturation instructions not DSP-only
Summary:
Commit 276701 requires that targets have the DSP extensions to use
certain saturating instructions. This requires some corrections.
For ARM ISA the instructions in question are available in all v6*
architectures.
For Thumb2, the instructions in question are available from v6T2.
SSAT and USAT are part of the base architecture while SSAT16 and
USAT16 require the DSP extensions.
Reviewers: rengolin
Subscribers: aemerson, rengolin, samparker, llvm-commits
Differential Revision: https://reviews.llvm.org/D23010
llvm-svn: 277439
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 2571e8b9368..0987eb225f1 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3850,7 +3850,7 @@ SDValue ARMTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const { // Try to convert two saturating conditional selects into a single SSAT SDValue SatValue; uint64_t SatConstant; - if (Subtarget->hasDSP() && + if (((!Subtarget->isThumb() && Subtarget->hasV6Ops()) || Subtarget->isThumb2()) && isSaturatingConditional(Op, SatValue, SatConstant)) return DAG.getNode(ARMISD::SSAT, dl, VT, SatValue, DAG.getConstant(countTrailingOnes(SatConstant), dl, VT)); |
