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| author | Renato Golin <rengolin@systemcall.org> | 2012-12-20 13:52:11 +0000 |
|---|---|---|
| committer | Renato Golin <rengolin@systemcall.org> | 2012-12-20 13:52:11 +0000 |
| commit | 6b2ea4a48f5c80d8397061140657dbd22682cc8b (patch) | |
| tree | 0b314c8597c99af08fd2b5d566cacba0876904ff /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | f827eb629d494abc690c57116f448797a55638fa (diff) | |
| download | bcm5719-llvm-6b2ea4a48f5c80d8397061140657dbd22682cc8b.tar.gz bcm5719-llvm-6b2ea4a48f5c80d8397061140657dbd22682cc8b.zip | |
Adding support for llvm.arm.neon.vaddl[su].* and
llvm.arm.neon.vsub[su].* intrinsics.
Patch by Pete Couperus <pjcoup@gmail.com>
llvm-svn: 170694
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 8034ce16043..1105f412cce 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -1007,6 +1007,10 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const { case ARMISD::VTBL2: return "ARMISD::VTBL2"; case ARMISD::VMULLs: return "ARMISD::VMULLs"; case ARMISD::VMULLu: return "ARMISD::VMULLu"; + case ARMISD::VADDLs: return "ARMISD::VADDLs"; + case ARMISD::VADDLu: return "ARMISD::VADDLu"; + case ARMISD::VSUBLs: return "ARMISD::VSUBLs"; + case ARMISD::VSUBLu: return "ARMISD::VSUBLu"; case ARMISD::UMLAL: return "ARMISD::UMLAL"; case ARMISD::SMLAL: return "ARMISD::SMLAL"; case ARMISD::BUILD_VECTOR: return "ARMISD::BUILD_VECTOR"; @@ -2429,6 +2433,20 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), Op.getOperand(1), Op.getOperand(2)); } + case Intrinsic::arm_neon_vaddls: + case Intrinsic::arm_neon_vaddlu: { + unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vaddls) + ? ARMISD::VADDLs : ARMISD::VADDLu; + return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), + Op.getOperand(1), Op.getOperand(2)); + } + case Intrinsic::arm_neon_vsubls: + case Intrinsic::arm_neon_vsublu: { + unsigned NewOpc = (IntNo == Intrinsic::arm_neon_vsubls) + ? ARMISD::VSUBLs: ARMISD::VSUBLu; + return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), + Op.getOperand(1), Op.getOperand(2)); + } } } |
