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author | Jonathan Roelofs <jonathan@codesourcery.com> | 2014-08-21 14:35:47 +0000 |
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committer | Jonathan Roelofs <jonathan@codesourcery.com> | 2014-08-21 14:35:47 +0000 |
commit | 5e98ff967b23e84edf96513ac6e12213104b3148 (patch) | |
tree | ade5afb7b80ab45a8cded9c4f08e27ae1a87865f /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
parent | a96344b50d09e299184772ccd06f9b30c0022f65 (diff) | |
download | bcm5719-llvm-5e98ff967b23e84edf96513ac6e12213104b3148.tar.gz bcm5719-llvm-5e98ff967b23e84edf96513ac6e12213104b3148.zip |
Add a thread-model knob for lowering atomics on baremetal & single threaded systems
http://reviews.llvm.org/D4984
llvm-svn: 216182
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index faf12fefffd..42c8f202e0f 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -781,8 +781,12 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); // ARMv6 Thumb1 (except for CPUs that support dmb / dsb) and earlier use - // the default expansion. - if (Subtarget->hasAnyDataBarrier() && !Subtarget->isThumb1Only()) { + // the default expansion. If we are targeting a single threaded system, + // then set them all for expand so we can lower them later into their + // non-atomic form. + if (TM.Options.ThreadModel == ThreadModel::Single) + setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); + else if (Subtarget->hasAnyDataBarrier() && !Subtarget->isThumb1Only()) { // ATOMIC_FENCE needs custom lowering; the others should have been expanded // to ldrex/strex loops already. setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom); |