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authorBradley Smith <bradley.smith@arm.com>2016-01-15 10:25:35 +0000
committerBradley Smith <bradley.smith@arm.com>2016-01-15 10:25:35 +0000
commit519563e371e6d4294b1a62ffe444bf68d6267cc8 (patch)
treecb66cf98e2593b5ca3dac1afc0241b1e1eeda5b8 /llvm/lib/Target/ARM/ARMISelLowering.cpp
parentd9a99ce53d7d84aad8f7019b4628020f51046f25 (diff)
downloadbcm5719-llvm-519563e371e6d4294b1a62ffe444bf68d6267cc8.tar.gz
bcm5719-llvm-519563e371e6d4294b1a62ffe444bf68d6267cc8.zip
[ARM] Add SDIV/UDIV instructions to ARMv8-M Baseline
llvm-svn: 257880
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 37c0795af28..65355628b74 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -773,8 +773,9 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
if (!Subtarget->hasV6Ops())
setOperationAction(ISD::BSWAP, MVT::i32, Expand);
- if (!(Subtarget->hasDivide() && Subtarget->isThumb2()) &&
- !(Subtarget->hasDivideInARMMode() && !Subtarget->isThumb())) {
+ bool hasDivide = Subtarget->isThumb() ? Subtarget->hasDivide()
+ : Subtarget->hasDivideInARMMode();
+ if (!hasDivide) {
// These are expanded into libcalls if the cpu doesn't have HW divider.
setOperationAction(ISD::SDIV, MVT::i32, LibCall);
setOperationAction(ISD::UDIV, MVT::i32, LibCall);
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