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authorJim Grosbach <grosbach@apple.com>2009-08-12 17:38:44 +0000
committerJim Grosbach <grosbach@apple.com>2009-08-12 17:38:44 +0000
commit3cfc6463c9ae1e223f943efc9e659d3a81727085 (patch)
treeb308a056bd53b8f13733245df9b221e7d70991f5 /llvm/lib/Target/ARM/ARMISelLowering.cpp
parente274526d78b1a5be466122f2ab9ca14d38ff7338 (diff)
downloadbcm5719-llvm-3cfc6463c9ae1e223f943efc9e659d3a81727085.tar.gz
bcm5719-llvm-3cfc6463c9ae1e223f943efc9e659d3a81727085.zip
Add catch block handling to SjLj exception handling.
llvm-svn: 78817
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 366c87cd1ac..0d2d7d2ad40 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -312,6 +312,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::VAEND, MVT::Other, Expand);
setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+ setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
+ // FIXME: Shouldn't need this, since no register is used, but the legalizer
+ // doesn't yet know how to not do that for SjLj.
+ setExceptionSelectorRegister(ARM::R0);
if (Subtarget->isThumb())
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom);
else
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