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authorChad Rosier <mcrosier@apple.com>2013-06-22 18:37:38 +0000
committerChad Rosier <mcrosier@apple.com>2013-06-22 18:37:38 +0000
commit295bd43adb9c514c53f6df861ae1c6e97c23a53a (patch)
treed13c5eb42f4e12a882379551c8263b927fed7cbe /llvm/lib/Target/ARM/ARMISelLowering.cpp
parent40d7f354b5637066a7ad3d50e19df482ee234d53 (diff)
downloadbcm5719-llvm-295bd43adb9c514c53f6df861ae1c6e97c23a53a.tar.gz
bcm5719-llvm-295bd43adb9c514c53f6df861ae1c6e97c23a53a.zip
The getRegForInlineAsmConstraint function should only accept MVT value types.
llvm-svn: 184642
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index a63cb27b1e5..6b981d5ba52 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -10310,7 +10310,7 @@ ARMTargetLowering::getSingleConstraintMatchWeight(
typedef std::pair<unsigned, const TargetRegisterClass*> RCPair;
RCPair
ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
- EVT VT) const {
+ MVT VT) const {
if (Constraint.size() == 1) {
// GCC ARM Constraint Letters
switch (Constraint[0]) {
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