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author | Jim Grosbach <grosbach@apple.com> | 2013-07-08 18:18:52 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2013-07-08 18:18:52 +0000 |
commit | 24e102a947d169b6415627d5d0a547965355a18a (patch) | |
tree | 28045b86bf5342b3954b49e4ca14fc23cfaddabf /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
parent | 4b2967ff9f6ffeb41b3965d396f469d3e95ee74e (diff) | |
download | bcm5719-llvm-24e102a947d169b6415627d5d0a547965355a18a.tar.gz bcm5719-llvm-24e102a947d169b6415627d5d0a547965355a18a.zip |
ARM: Improve codegen for generic vselect.
Fall back to by-element insert rather than building it up on the stack.
rdar://14351991
llvm-svn: 185846
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 991a703f818..8c4a3f13d13 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -4734,6 +4734,24 @@ SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, return DAG.getNode(ISD::BITCAST, dl, VT, Val); } + // If all else fails, just use a sequence of INSERT_VECTOR_ELT when we + // know the default expansion would otherwise fall back on something even + // worse. For a vector with one or two non-undef values, that's + // scalar_to_vector for the elements followed by a shuffle (provided the + // shuffle is valid for the target) and materialization element by element + // on the stack followed by a load for everything else. + if (!isConstant && !usesOnlyOneValue) { + SDValue Vec = DAG.getUNDEF(VT); + for (unsigned i = 0 ; i < NumElts; ++i) { + SDValue V = Op.getOperand(i); + if (V.getOpcode() == ISD::UNDEF) + continue; + SDValue LaneIdx = DAG.getConstant(i, MVT::i32); + Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); + } + return Vec; + } + return SDValue(); } |