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authorChristian Pirker <cpirker@a-bix.com>2014-05-12 11:19:20 +0000
committerChristian Pirker <cpirker@a-bix.com>2014-05-12 11:19:20 +0000
commit238c7c165b80444d4bac96632418720ca10f5748 (patch)
treeeccf5877c826672fc8bc8c8cdb7d0a8110004d1e /llvm/lib/Target/ARM/ARMISelLowering.cpp
parent626edb6f49349255522896ed40e2ff28c9e64150 (diff)
downloadbcm5719-llvm-238c7c165b80444d4bac96632418720ca10f5748.tar.gz
bcm5719-llvm-238c7c165b80444d4bac96632418720ca10f5748.zip
ARM: Implement big endian bit-conversion for NEON type
llvm-svn: 208538
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp10
1 files changed, 8 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 44e52c09f69..e8e28cac206 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -3964,8 +3964,14 @@ static SDValue ExpandBITCAST(SDNode *N, SelectionDAG &DAG) {
// Turn f64->i64 into VMOVRRD.
if (DstVT == MVT::i64 && TLI.isTypeLegal(SrcVT)) {
- SDValue Cvt = DAG.getNode(ARMISD::VMOVRRD, dl,
- DAG.getVTList(MVT::i32, MVT::i32), Op);
+ SDValue Cvt;
+ if (TLI.isBigEndian() && SrcVT.isVector())
+ Cvt = DAG.getNode(ARMISD::VMOVRRD, dl,
+ DAG.getVTList(MVT::i32, MVT::i32),
+ DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op));
+ else
+ Cvt = DAG.getNode(ARMISD::VMOVRRD, dl,
+ DAG.getVTList(MVT::i32, MVT::i32), Op);
// Merge the pieces into a single i64 value.
return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1));
}
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