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author | Tom Stellard <thomas.stellard@amd.com> | 2014-09-25 18:59:23 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-09-25 18:59:23 +0000 |
commit | 1fa1ce6112a5a1550b107daae3d9ddd7017dd25c (patch) | |
tree | 16a5c56c9fbb9f81448a4e11d6c54cd0b444160d /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
parent | 529efcf9d055bf78e678d4cbf6027f4737d4fd0d (diff) | |
download | bcm5719-llvm-1fa1ce6112a5a1550b107daae3d9ddd7017dd25c.tar.gz bcm5719-llvm-1fa1ce6112a5a1550b107daae3d9ddd7017dd25c.zip |
ARM: Remove unneeded check for MI->hasPostISelHook()
llvm-svn: 218459
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index ec59ec50a1d..425732cb7d2 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -7668,12 +7668,6 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, void ARMTargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const { - if (!MI->hasPostISelHook()) { - assert(!convertAddSubFlagsOpcode(MI->getOpcode()) && - "Pseudo flag-setting opcodes must be marked with 'hasPostISelHook'"); - return; - } - const MCInstrDesc *MCID = &MI->getDesc(); // Adjust potentially 's' setting instructions after isel, i.e. ADC, SBC, RSB, // RSC. Coming out of isel, they have an implicit CPSR def, but the optional |