Added isLegalAddressExpression(). Only allows X +/- C for now.

llvm-svn: 35122

1 files changed, 15 insertions, 0 deletions

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index f23d8aeb37e..40ede7409ac 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -22,6 +22,7 @@
 #include "ARMTargetMachine.h"
 #include "llvm/CallingConv.h"
 #include "llvm/Constants.h"
+#include "llvm/Instruction.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
@@ -1269,6 +1270,20 @@ ARMTargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
 //                           ARM Optimization Hooks
 //===----------------------------------------------------------------------===//
 
+/// isLegalAddressExpression - Return true if the binary expression made up of
+/// specified opcode, operands, and type can be folded into target addressing
+/// mode for load / store of the given type.
+bool ARMTargetLowering::isLegalAddressExpression(unsigned Opc, Value *Op0,
+                                             Value *Op1, const Type *Ty) const {
+  if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
+    if (Opc == Instruction::Add)
+      return isLegalAddressImmediate(Op1C->getSExtValue(), Ty);
+    if (Opc == Instruction::Sub)
+      return isLegalAddressImmediate(-Op1C->getSExtValue(), Ty);
+  }
+  return false;
+}
+
 /// isLegalAddressImmediate - Return true if the integer value can be used
 /// as the offset of the target addressing mode for load / store of the
 /// given type.