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| author | Jim Grosbach <grosbach@apple.com> | 2010-07-23 23:50:35 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-07-23 23:50:35 +0000 |
| commit | 0acbcb1a60fe92d76692c1d36edc17f9abf9cdd6 (patch) | |
| tree | 47806adb3f3be9e41af825ef31c7b44840f3cd57 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | ff4a2951d97d805abe21ded3489ee6ac8f2ab45d (diff) | |
| download | bcm5719-llvm-0acbcb1a60fe92d76692c1d36edc17f9abf9cdd6.tar.gz bcm5719-llvm-0acbcb1a60fe92d76692c1d36edc17f9abf9cdd6.zip | |
Use the appropriate register class for an i32 when adding ARM::LR to the
function live in set. This will give us tGPR for Thumb1 and GPR otherwise,
so the copy will be spillable. rdar://8224931
llvm-svn: 109293
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 1f9908c6f6c..35ca389bf33 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -2608,7 +2608,7 @@ SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{ } // Return LR, which contains the return address. Mark it an implicit live-in. - unsigned Reg = MF.addLiveIn(ARM::LR, ARM::GPRRegisterClass); + unsigned Reg = MF.addLiveIn(ARM::LR, getRegClassFor(MVT::i32)); return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT); } |
