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authorRafael Espindola <rafael.espindola@gmail.com>2007-10-31 11:52:06 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2007-10-31 11:52:06 +0000
commit063f1773001bbe8a86303ff31e1d41a0b8dee0ef (patch)
treeca36762a30317baff403381f6c6fff3ad6b5e312 /llvm/lib/Target/ARM/ARMISelLowering.cpp
parent3b4668a5d8c614b165648b080f6e48e9e87f9f54 (diff)
downloadbcm5719-llvm-063f1773001bbe8a86303ff31e1d41a0b8dee0ef.tar.gz
bcm5719-llvm-063f1773001bbe8a86303ff31e1d41a0b8dee0ef.zip
Make ARM an X86 memcpy expansion more similar to each other.
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it. This should not change generated code. llvm-svn: 43552
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 154832b62bd..ef1c86d22a8 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -1315,7 +1315,8 @@ SDOperand ARMTargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG,
// this once Thumb ldmia / stmia support is added.
unsigned Size = I->getValue();
if (AlwaysInline ||
- (!ST->isThumb() && Size < 64 && (Align & 3) == 0))
+ (!ST->isThumb() && Size <= Subtarget->getMaxInlineSizeThreshold() &&
+ (Align & 3) == 0))
return LowerMEMCPYInline(ChainOp, DestOp, SourceOp, Size, Align, DAG);
return LowerMEMCPYCall(ChainOp, DestOp, SourceOp, CountOp, DAG);
}
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