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authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2018-06-21 18:36:04 +0000
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>2018-06-21 18:36:04 +0000
commit766c77efd7ec420583458d2f0726f42058109383 (patch)
tree7c399365d1dcd3f4ea9e20327c5e1f7b4ce76ab1 /llvm/lib/Target/AMDGPU
parent3382dc644e86cded3e6b6e6069c8cc4e484886a7 (diff)
downloadbcm5719-llvm-766c77efd7ec420583458d2f0726f42058109383.tar.gz
bcm5719-llvm-766c77efd7ec420583458d2f0726f42058109383.zip
AMDGPU/AMDHSA: Remove GridWorkGroupCountX/Y/Z
and everything that comes with it from implementation and v3 header files. Leave definition in v2 header files for backwards compatibility. Differential Revision: https://reviews.llvm.org/D48191 llvm-svn: 335267
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp3
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h3
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp27
-rw-r--r--llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp3
-rw-r--r--llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h15
5 files changed, 0 insertions, 51 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
index dcca3a2fab9..7465cf22b5a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
@@ -55,9 +55,6 @@ void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const {
<< " DispatchID: " << FI.second.DispatchID
<< " FlatScratchInit: " << FI.second.FlatScratchInit
<< " PrivateSegmentSize: " << FI.second.PrivateSegmentSize
- << " GridWorkgroupCountX: " << FI.second.GridWorkGroupCountX
- << " GridWorkgroupCountY: " << FI.second.GridWorkGroupCountY
- << " GridWorkgroupCountZ: " << FI.second.GridWorkGroupCountZ
<< " WorkGroupIDX: " << FI.second.WorkGroupIDX
<< " WorkGroupIDY: " << FI.second.WorkGroupIDY
<< " WorkGroupIDZ: " << FI.second.WorkGroupIDZ
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
index bf9635549a8..b2bc4021b46 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
@@ -111,9 +111,6 @@ struct AMDGPUFunctionArgInfo {
ArgDescriptor DispatchID;
ArgDescriptor FlatScratchInit;
ArgDescriptor PrivateSegmentSize;
- ArgDescriptor GridWorkGroupCountX;
- ArgDescriptor GridWorkGroupCountY;
- ArgDescriptor GridWorkGroupCountZ;
// System SGPRs in kernels.
ArgDescriptor WorkGroupIDX;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 5d6e98a1861..8af37fa1615 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -360,18 +360,6 @@ uint16_t AMDGPUAsmPrinter::getAmdhsaKernelCodeProperties(
KernelCodeProperties |=
amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT;
}
- if (MFI.hasGridWorkgroupCountX()) {
- KernelCodeProperties |=
- amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X;
- }
- if (MFI.hasGridWorkgroupCountY()) {
- KernelCodeProperties |=
- amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y;
- }
- if (MFI.hasGridWorkgroupCountZ()) {
- KernelCodeProperties |=
- amdhsa::KERNEL_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z;
- }
return KernelCodeProperties;
}
@@ -1207,21 +1195,6 @@ void AMDGPUAsmPrinter::getAmdKernelCode(amd_kernel_code_t &Out,
if (MFI->hasFlatScratchInit())
Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT;
- if (MFI->hasGridWorkgroupCountX()) {
- Out.code_properties |=
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_X;
- }
-
- if (MFI->hasGridWorkgroupCountY()) {
- Out.code_properties |=
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Y;
- }
-
- if (MFI->hasGridWorkgroupCountZ()) {
- Out.code_properties |=
- AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z;
- }
-
if (MFI->hasDispatchPtr())
Out.code_properties |= AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR;
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index 0a789dcd090..1b74c140d0a 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -35,9 +35,6 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
KernargSegmentPtr(false),
DispatchID(false),
FlatScratchInit(false),
- GridWorkgroupCountX(false),
- GridWorkgroupCountY(false),
- GridWorkgroupCountZ(false),
WorkGroupIDX(false),
WorkGroupIDY(false),
WorkGroupIDZ(false),
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
index 6a3eae4b128..ef91d1e4307 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
@@ -155,9 +155,6 @@ private:
bool KernargSegmentPtr : 1;
bool DispatchID : 1;
bool FlatScratchInit : 1;
- bool GridWorkgroupCountX : 1;
- bool GridWorkgroupCountY : 1;
- bool GridWorkgroupCountZ : 1;
// Feature bits required for inputs passed in system SGPRs.
bool WorkGroupIDX : 1; // Always initialized.
@@ -336,18 +333,6 @@ public:
return FlatScratchInit;
}
- bool hasGridWorkgroupCountX() const {
- return GridWorkgroupCountX;
- }
-
- bool hasGridWorkgroupCountY() const {
- return GridWorkgroupCountY;
- }
-
- bool hasGridWorkgroupCountZ() const {
- return GridWorkgroupCountZ;
- }
-
bool hasWorkGroupIDX() const {
return WorkGroupIDX;
}
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