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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-06-26 03:01:31 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-06-26 03:01:31 +0000
commit10fc062b2b6b52b8cf7b6da67db25792720e7384 (patch)
tree930a4c3fbd8a989a7e512cbff884f3508d4fc13a /llvm/lib/Target/AMDGPU/SIRegisterInfo.h
parent19d0ccaef317813005352ac56bc71488ded7b611 (diff)
downloadbcm5719-llvm-10fc062b2b6b52b8cf7b6da67db25792720e7384.tar.gz
bcm5719-llvm-10fc062b2b6b52b8cf7b6da67db25792720e7384.zip
AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling
This should not be treated as a different version of private_segment_buffer. These are distinct things with different uses and register classes, and requires the function argument info to have more context about the function's type and environment. Also add missing test coverage for the intrinsic, and emit an error for HSA. This also encovers that the intrinsic is broken unless there happen to be stack objects. llvm-svn: 306264
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIRegisterInfo.h')
-rw-r--r--llvm/lib/Target/AMDGPU/SIRegisterInfo.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 8fed6d5f971..600cc886cb5 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -197,12 +197,13 @@ public:
WORKGROUP_ID_Y = 11,
WORKGROUP_ID_Z = 12,
PRIVATE_SEGMENT_WAVE_BYTE_OFFSET = 14,
+ IMPLICIT_BUFFER_PTR = 15,
// VGPRS:
- FIRST_VGPR_VALUE = 15,
+ FIRST_VGPR_VALUE = 16,
WORKITEM_ID_X = FIRST_VGPR_VALUE,
- WORKITEM_ID_Y = 16,
- WORKITEM_ID_Z = 17
+ WORKITEM_ID_Y = 17,
+ WORKITEM_ID_Z = 18
};
/// \brief Returns the physical register that \p Value is stored in.
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