summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
diff options
context:
space:
mode:
authorPiotr Sobczak <piotr.sobczak@amd.com>2019-04-19 06:19:14 +0000
committerPiotr Sobczak <piotr.sobczak@amd.com>2019-04-19 06:19:14 +0000
commit72e2960e525a30bd8a105bd474b5c38267de02fc (patch)
treec39759215183c8acda8511f99911240c41851b1c /llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
parentce3f75df1fffdb8bcef66ff82e83fa895e00260e (diff)
downloadbcm5719-llvm-72e2960e525a30bd8a105bd474b5c38267de02fc.tar.gz
bcm5719-llvm-72e2960e525a30bd8a105bd474b5c38267de02fc.zip
[AMDGPU] Ignore non-SUnits edges
Summary: Ignore edges to non-SUnits (e.g. ExitSU) when checking for low latency instructions. When calling the function isLowLatencyInstruction(), an ExitSU could be on the list of successors, not necessarily a regular SU. In other places in the code there is a check "Succ->NodeNum >= DAGSize" to prevent further processing of ExitSU as "Succ->getInstr()" is NULL in such a case. Also, 8 out of 9 cases of "SUnit *Succ = SuccDep.getSUnit())" has the guard, so it is clearly an omission here. Change-Id: Ica86f0327c7b2e6bcb56958e804ea6c71084663b Reviewers: nhaehnle Reviewed By: nhaehnle Subscribers: MatzeB, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60864 llvm-svn: 358740
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp b/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
index 22fa16632c9..343c8b6e7a6 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
@@ -1874,6 +1874,8 @@ void SIScheduleDAGMI::moveLowLatencies() {
bool CopyForLowLat = false;
for (SDep& SuccDep : SU->Succs) {
SUnit *Succ = SuccDep.getSUnit();
+ if (SuccDep.isWeak() || Succ->NodeNum >= DAGSize)
+ continue;
if (SITII->isLowLatencyInstruction(*Succ->getInstr())) {
CopyForLowLat = true;
}
OpenPOWER on IntegriCloud