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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-08 00:55:44 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-08 00:55:44 +0000 |
| commit | a74374a86b7948b5c772d5aa761cb24c8568b024 (patch) | |
| tree | b7029dde43c78e6aa791a9bdcd1c67775c8f3d90 /llvm/lib/Target/AMDGPU/SIInstructions.td | |
| parent | d4a84b1ed2e2205067afc600a87dace3e2ee5bbb (diff) | |
| download | bcm5719-llvm-a74374a86b7948b5c772d5aa761cb24c8568b024.tar.gz bcm5719-llvm-a74374a86b7948b5c772d5aa761cb24c8568b024.zip | |
AMDGPU: Move si_mask_branch register operand to be a use
llvm-svn: 274818
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstructions.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 9eff2e056a8..46b3e50b78b 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -1929,7 +1929,7 @@ let hasSideEffects = 1, isPseudo = 1, isCodeGenOnly = 1 in { // Dummy terminator instruction to use after control flow instructions // replaced with exec mask operations. def SI_MASK_BRANCH : InstSI < - (outs SReg_64:$dst), (ins brtarget:$target)> { + (outs), (ins brtarget:$target, SReg_64:$dst)> { let isBranch = 1; let isTerminator = 1; let isBarrier = 1; |
