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authorJay Foad <jay.foad@gmail.com>2019-07-12 15:02:59 +0000
committerJay Foad <jay.foad@gmail.com>2019-07-12 15:02:59 +0000
commit7816ad918ff2049c2b3349d3500ad0a47c4f8ac7 (patch)
tree535a6cf63bb2867222939cb8c4fd665897a9e1bd /llvm/lib/Target/AMDGPU/SIInstructions.td
parentb251cc0d91362ea44f00a0138998a0272791f7dc (diff)
downloadbcm5719-llvm-7816ad918ff2049c2b3349d3500ad0a47c4f8ac7.tar.gz
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[AMDGPU] Restrict v_cndmask_b32 abs/neg modifiers to f32
Summary: D64497 allowed abs/neg source modifiers on v_cndmask_b32 but it doesn't make any sense to apply them to f16 operands; they would interpret the bits of the value as an f32, giving nonsensical results. This patch restricts them to f32 operands. Reviewers: arsenm, hakzsam Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64636 llvm-svn: 365904
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstructions.td')
-rw-r--r--llvm/lib/Target/AMDGPU/SIInstructions.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 05fdd3065aa..fd4b6f5e3e3 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -791,8 +791,8 @@ def : FMADModsPat<V_MAD_F16, AMDGPUfmad_ftz, f16> {
multiclass SelectPat <ValueType vt> {
def : GCNPat <
- (vt (select i1:$src0, (VOP3Mods vt:$src1, i32:$src1_mods),
- (VOP3Mods vt:$src2, i32:$src2_mods))),
+ (vt (select i1:$src0, (VOP3Mods_f32 vt:$src1, i32:$src1_mods),
+ (VOP3Mods_f32 vt:$src2, i32:$src2_mods))),
(V_CNDMASK_B32_e64 $src2_mods, $src2, $src1_mods, $src1, $src0)
>;
}
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