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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-26 23:16:16 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-26 23:16:16 +0000 |
| commit | 4f331cb1f31ed122ffdc66208b7911c5e8bfb587 (patch) | |
| tree | 22eb2e7ae020b807d5214d459a9be437e32119b8 /llvm/lib/Target/AMDGPU/SIInstrInfo.h | |
| parent | a9fdf375b3769a1df18d72aa6eb1e627a22a29e7 (diff) | |
| download | bcm5719-llvm-4f331cb1f31ed122ffdc66208b7911c5e8bfb587.tar.gz bcm5719-llvm-4f331cb1f31ed122ffdc66208b7911c5e8bfb587.zip | |
[AMDGPU] gfx1010 VOPC implementation
Differential Revision: https://reviews.llvm.org/D61208
llvm-svn: 359358
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h index a22f5a68ee6..c4038b3dc29 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h @@ -379,6 +379,14 @@ public: return get(Opcode).TSFlags & SIInstrFlags::SOPP; } + static bool isPacked(const MachineInstr &MI) { + return MI.getDesc().TSFlags & SIInstrFlags::IsPacked; + } + + bool isPacked(uint16_t Opcode) const { + return get(Opcode).TSFlags & SIInstrFlags::IsPacked; + } + static bool isVOP1(const MachineInstr &MI) { return MI.getDesc().TSFlags & SIInstrFlags::VOP1; } @@ -1014,6 +1022,9 @@ namespace AMDGPU { LLVM_READONLY int getGlobalSaddrOp(uint16_t Opcode); + LLVM_READONLY + int getVCMPXNoSDstOp(uint16_t Opcode); + const uint64_t RSRC_DATA_FORMAT = 0xf00000000000LL; const uint64_t RSRC_ELEMENT_SIZE_SHIFT = (32 + 19); const uint64_t RSRC_INDEX_STRIDE_SHIFT = (32 + 21); |
