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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-12 00:23:17 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-12 00:23:17 +0000 |
| commit | fc7e6a0a0ef5ba19c35026f6aac1907bce770e90 (patch) | |
| tree | 66ebaa16b165d82a18289af20691480b5c91dc4c /llvm/lib/Target/AMDGPU/SIInstrFormats.td | |
| parent | 840593e19d3a905925fa1fb2b3874329bff48216 (diff) | |
| download | bcm5719-llvm-fc7e6a0a0ef5ba19c35026f6aac1907bce770e90.tar.gz bcm5719-llvm-fc7e6a0a0ef5ba19c35026f6aac1907bce770e90.zip | |
AMDGPU: Cleanup pseudoinstructions
llvm-svn: 275133
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrFormats.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrFormats.td | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td index 5502777fb31..2f63d4ed13b 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td +++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td @@ -91,6 +91,12 @@ class InstSI <dag outs, dag ins, string asm = "", let isAsmParserOnly = !if(!eq(DisableDecoder{0}, {0}), 0, 1); } +class PseudoInstSI<dag outs, dag ins, list<dag> pattern = []> + : InstSI<outs, ins, "", pattern> { + let isPseudo = 1; + let isCodeGenOnly = 1; +} + class Enc32 { field bits<32> Inst; int Size = 4; @@ -137,8 +143,10 @@ class VOP2Common <dag outs, dag ins, string asm, list<dag> pattern> : let Size = 4; } -class VOP3Common <dag outs, dag ins, string asm, list<dag> pattern, bit HasMods = 0, bit VOP3Only = 0> : - VOPAnyCommon <outs, ins, asm, pattern> { +class VOP3Common <dag outs, dag ins, string asm = "", + list<dag> pattern = [], bit HasMods = 0, + bit VOP3Only = 0> : + VOPAnyCommon <outs, ins, asm, pattern> { // Using complex patterns gives VOP3 patterns a very high complexity rating, // but standalone patterns are almost always prefered, so we need to adjust the |
