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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-07 20:18:34 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-08-07 20:18:34 +0000 |
| commit | 711b390a7c7854679388053e543273c56c25196e (patch) | |
| tree | 2d4f9a1816b086af1059895e0c9da01716aa074a /llvm/lib/Target/AMDGPU/SIISelLowering.h | |
| parent | ee0b2b5c2b9a7e8af3e278b5f9f4aaf10827754f (diff) | |
| download | bcm5719-llvm-711b390a7c7854679388053e543273c56c25196e.tar.gz bcm5719-llvm-711b390a7c7854679388053e543273c56c25196e.zip | |
AMDGPU: Assume SMRD access for constant address space
Since r243294 these are selected to SMRD and
moved later if required.
llvm-svn: 244354
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h index d84c32ec009..a8b8ad34ed9 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.h +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h @@ -57,6 +57,7 @@ class SITargetLowering : public AMDGPUTargetLowering { SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const; bool isLegalFlatAddressingMode(const AddrMode &AM) const; + bool isLegalMUBUFAddressingMode(const AddrMode &AM) const; public: SITargetLowering(TargetMachine &tm, const AMDGPUSubtarget &STI); |
