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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-09-10 21:51:19 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-09-10 21:51:19 +0000 |
| commit | e0b44040aaa48a6f0b84ea18beffc7de33078731 (patch) | |
| tree | 12327e113d5ed2d2533bdf89ab80d5a4198a6e59 /llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | |
| parent | 57116cce197b2d2eaa491556f451e5f5bfeb1002 (diff) | |
| download | bcm5719-llvm-e0b44040aaa48a6f0b84ea18beffc7de33078731.tar.gz bcm5719-llvm-e0b44040aaa48a6f0b84ea18beffc7de33078731.zip | |
AMDGPU: Simplify debug printing
llvm-svn: 247345
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp index 23502b45905..1cf520d360e 100644 --- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp +++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp @@ -215,10 +215,8 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) { I != E; ++I) { MachineInstr &MI = *I; if (MI.getOpcode() == AMDGPU::COPY && isVGPRToSGPRCopy(MI, TRI, MRI)) { - DEBUG(dbgs() << "Fixing VGPR -> SGPR copy:\n"); - DEBUG(MI.print(dbgs())); + DEBUG(dbgs() << "Fixing VGPR -> SGPR copy: " << MI); TII->moveToVALU(MI); - } switch (MI.getOpcode()) { |
