diff options
| author | Diana Picus <diana.picus@linaro.org> | 2017-01-13 09:58:52 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-01-13 09:58:52 +0000 |
| commit | 116bbab4e4f440364bdaa900bc70d6c262a0b973 (patch) | |
| tree | e3dc7375d120e028e5e16212b47cadf53753c87c /llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | |
| parent | 4f8c3e18824278a2fc59f273af5793ee8d5e2618 (diff) | |
| download | bcm5719-llvm-116bbab4e4f440364bdaa900bc70d6c262a0b973.tar.gz bcm5719-llvm-116bbab4e4f440364bdaa900bc70d6c262a0b973.zip | |
[CodeGen] Rename MachineInstrBuilder::addOperand. NFC
Rename from addOperand to just add, to match the other method that has been
added to MachineInstrBuilder for adding more than just 1 operand.
See https://reviews.llvm.org/D28057 for the whole discussion.
Differential Revision: https://reviews.llvm.org/D28556
llvm-svn: 291891
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp index 6a422e70fe1..43cb15f502c 100644 --- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp +++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp @@ -234,8 +234,9 @@ static bool foldVGPRCopyIntoRegSequence(MachineInstr &MI, unsigned TmpReg = MRI.createVirtualRegister(NewSrcRC); - BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY), TmpReg) - .addOperand(MI.getOperand(I)); + BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY), + TmpReg) + .add(MI.getOperand(I)); MI.getOperand(I).setReg(TmpReg); } |
